High Accuracy Timing IP Core (HATI)

The HATI (High Accuracy Timing IP) is a FPGA core intended to enable sub-nanosecond synchronization accuracy to a third-party hardware when it is connected to a Orolia’s device by using 1GbE (Futurely 10GbE) optical fibre links (Figure 1). The core is based on IEEE-1588, Sync-E and precise clock compensation to achieve it. This design is integrable in optical 1G/10G ethernet links without requiring any external hardware.

It is necessary that each network element holds a FPGA straight connected to the port which will receive/distribute the synchronization from/to the network since the HATI core needs to introduce and recover certain traffic flow which will be the source of the synchronization process.

It allows the distribution of the time and frequency within a sub nanosecond accuracy through standard optical fibre for distances up to 80 km (Figure 2). The HATI core provides determinism delivery of timing information for time-critical applications by using Ethernet optical fibre links.

In addition, this link can be used to transfer standard data such as UDP/TCP packets without affecting the synchronization quality.

The HATI consumes FPGA resources exclusively. Lastest version has been adapted to work on the following list of FPGAs: Kintex7, Kintex7-US, Kintex-7US+, Virtex7 & Virtex7-US+. Additional platforms will be included shortly. It’s recommended, but not essential, to use the HATI along with a hard-processor connected to the FPGA (Zynq SoCs or external processor) in order to collect internal HATI information for monitoring and applying configuration.